The present invention relates to a capacitor-carrying semiconductor module for use in computers for reducing noise generated at the time of simultaneous switching operations at frequencies on the order of a GHz.
Recently, advances in technology have made it possible for the arithmetic operations of electronic computers to be speeded up more and more. However, this increase in speed has been accompanied by significant problems involving erroneous behavior of these computers caused by the generation of noise resulting primarily from variation in voltage of the power supply of the computer due to switching and crosstalk, i.e., interactions between signal transmission lines.
Various techniques have been proposed for reducing the noise from the power supply, and one of the most effective techniques is to insert a capacitor in a circuit with the power supply.
Capacitors are generally characterized by their capacitance, breakdown strength and frequency dependence, though the breakdown strength property is not very serious because electronic computers work at low voltages. In addition, it will be expected that the breakdown strength property of these capacitors will be less important in the future because of a tendency for the working voltages to be lowered. On the other hand, the speed of the arithmetic operations of the electronic computers is being increased continuously with the result that the working frequencies will inevitably enter into a high frequency range of the order of a GHz in the near future. For this reason, a capacitor having excellent properties at high-frequencies is required, and this objective is expected to be increasingly more critical in the future. Therefore, it is believed that much interest will be directed to frequency characteristic of capacitors, rather than the breakdown strength thereof in the future.
It is well known that the capacitance of a capacitor depends greatly on the dielectric constant of the dielectric material disposed between the electrodes. It is also well known that the dielectric constant is definitely related to polarization and that the configuration of the polarization affects the range of the working frequency to a great extent. The polarization is determined by a combination of the following four types of sub-polarizations, i.e., (1) space-charge polarization, (2) orientation (bipolar) polarization, (3) ionic polarization, and (4) electronic polarization.
High permittivity materials such as Pb(Mg.sub.1/3 Nb.sub.2/3)O.sub.3 -PbTiO.sub.3 (specific dielectric constant: on the order of 2.times.10.sup.4) and barium titanate (BaTiO.sub.3) (specific dielectric constant: on the order of 1.times.10.sup.4) have a high dielectric constant produced by the orientation (bipolar) polarization.
Among the sub-polarizations, the ionic polarization and the electronic polarization can stably function even at high frequencies in the range of a GHz or more. Therefore, the dielectric materials for capacitors to be used at high frequencies in the range of a GHz or more should be preferably those capable of being polarized by ionic polarization and electronic polarization, such as Ta.sub.2 O.sub.5. Recently, as reported in the article by Kan Yoshino, "High speed operation of packageable thin film Ta.sub.2 O.sub.5 capacitor", Technical Research Report, Vol. 88, No. 233, Electronic Information Communicating Society, a unitary capacitor in a form which is attachable onto a ceramic substrate has been proposed. However, it comprises a material having a low specific dielectric constant (20 to 30) and a large film thickness such as 100 .mu.m or more, so that its capacitance is at most 1 nF (nanofarad) (in dimensions of 2 mm square), which is short of the capacitance required for satisfactory absorption of noise. Moreover, no other circuit can be formed in the section comprising the capacitor, so that the packing density can not be increased.
Techniques for producing capacitors on a ceramic board have generally used technical applications requiring no high frequency characteristic. For example, there has been produced a composite ceramic board having capacitor elements and conductor lines formed integrally therein and sealed with insulating ceramics, as disclosed in Japanese Patents KOKAI (Laid-open) Nos. 62-169461 and 61-47691.
Also a chip carrier in which an array comprising a plurality of small capacitor elements disposed between at least one pair of ceramic sheets within sheets superimposed in a laminate has been proposed for the purpose of reducing noise generated at the time of simultaneous switchings, as disclosed in Japanese Patent KOKAI (Laid-open) No. 57-37818.
More recently, with the speeding up of the rising and descending times of signals used in logical circuits of electronic computers of a large type or a middle or small type, such as workstations, an increase in the number of the logical circuits to be simultaneously switched has produced a problem of generation of noise owing to such simultaneous switchings.
The present invention is directed to a reduction of noise generated in the power supply systems among others, though there are two sorts of noises attributable to power supply systems and signal circuits.
There are computers employing a combination of an ELC circuit, a bipolar bearing circuit and a CMOS circuit, forming a so-called BiCMOS circuit. When a plurality of logical circuits are simultaneously switched, noise is generated for various reasons via the power supplies. Among the noise which is generated, the most problematic cause for an ELC circuit may be attributed to fluctuation of the power supply Vtt, which fluctuation occurs owing to signal currents flowing into the power supply Vtt after passing through the terminal resistors. The noise which is generated due to this fluctuation of Vtt will be referred to herein as a "terminal resistor-simultaneous switching noise".
On the other hand, problematic noise in a BiCMOS circuit are the result of instantaneously flowing through-currents and inductances of the power supply lines. The reason for the generation of the through-currents in a BiCMOS circuit is that when a pair of transistors connected to the potential of the power supply and the earth potential in the BiCMOS circuit are switched corresponding to a logical "1" and "0" level, both transistors may be instantaneously in the ON state because one is switched to the ON state before the other finishes turning to the OFF state, resulting in the generation of a through-current. The rate of this transistor switching is of the order of 1 nanosecond or less, so that noise in the range of about 0.5 to 1 GHz is generated in the power supply under the influence of the inductance of the power supply system.
As a result of an intensive research on the problem of terminal resistor-simultaneous switching noises, it has been found that these noises contain a component V.sub.1 having almost the same rising time as that of the signals used in arithmetic operations and a delayed component V.sub.2 as shown in FIG. 4. A reduction in the noise component V.sub.2 can be effectively achieved by providing a capacitor having a relatively large capacitance.
It has been found, however, that the fast rising noise component V.sub.1 (rising time: 500 picoseconds or less) can not be reduced even with a capacitor of a higher capacitance. For this fast rising component V.sub.1, the shorter the rising time of signals used in the arithmetic operations, the larger will be the amount of noise generated. In recent years, as the rising time has been shortened to 500 picoseconds or less, it has been found that the fast rising noise component V.sub.1 produces serious problems.
Big noises beyond a certain limitation are undistinguishable from signal voltages, which makes it impossible to discern the logic "1" level from the logic "0" level. Therefore, the noises must be reduced below a certain level. In ECL circuits popularly used for high speed arithmetic operations in large type electronic computers, the logic signal amplitude is only of the order of 0.8 Volt, so that the amount of noise must be 100 mV or less. Even in a BiCMOS circuit, when the BiCMOS circuit is present in conjunction with an ECL circuit, the noise generated by the power supply system must be 100 mV or less in order to prevent the ECL circuit as well as the BiCMOS circuit itself from working erroneously owing to the noise generated by the power supply system in the BiCMOS circuit.